A manufacturing process of a semiconductor device may include a process that exposes the whole surface of a substrate, e.g., a semiconductor wafer (referred to as “wafer” herebelow). For example, JP2015-156472A (Patent Document 1) describes that a resist film made of a photosensitized chemically amplified resist is formed on a surface of a wafer, the resist film is exposed with the use of a pattern mask (pattern exposure), and then the whole surface of the wafer is exposed (flood exposure). By the flood exposure, acid increases in areas of the resist film subjected to the pattern exposure. Thereafter, the wafer is subjected to a heating process and a developing process so that the aforementioned areas are dissolved and a resist pattern is thus formed.
The exposure of the whole surface of the wafer is performed by moving the wafer in a back and forth direction below an LED array comprising a plurality of laterally-arrayed LEDs (light-emitting diodes) each configured to emit light downward. Japanese patent laid-open Publication No. JP2015-156472A discloses an exposure apparatus having such a structure. The LEDs are deteriorated with the lapse of the use time so that the exposure amounts in respective portions of the wafer decrease gradually. If the currents supplied to the LEDs are kept constant, it is possible that a desired processing result cannot be achieved. For example, the CD (Critical Dimension) of a resist pattern may be non-uniform in a plane of the wafer, in the case where the whole surface of the wafer is exposed to generate acid in the resist film as mentioned above. JP2015-156472A does not describe any solution to this problem.